Early resistance change and stress/electromigration evolution in near bamboo interconnects

A complete description for early resistance change and mechanical stress evolution in near-bamboo interconnects, related to the electromigration, is given in this paper. The proposed model, for the first time, combines the stress/vacancy concentration evolution with the early resistance change of the Al line with a near-bamboo microstructure, which has been proven to be a fast technique for prediction of the MTF of a line compared to the conventional (accelerated) stres

Te-based chalcogenide materials for selector applications

The implementation of dense, one-selector one-resistor (1S1R), resistive switching memory arrays, can be achieved with an appropriate selector for correct information storage and retrieval. Ovonic threshold switches (OTS) based on chalcogenide materials are a strong candidate, but their low thermal stability is one of the key factors that prevents rapid adoption by emerging resistive switching memory technologies. A previously developed map for phase change materials is expanded and improved for OTS materials. Selected materials from different areas of the map, belonging to binary Ge-Te and Si-Te systems, are explored. Several routes, including Si doping and reduction of Te amount, are used to increase the crystallization temperature. Selector devices, with areas as small as 55 x 55 nm(2), were electrically assessed. Sub-threshold conduction models, based on Poole-Frenkel conduction mechanism, are applied to fresh samples in order to extract as-processed material parameters, such as trap height and density of defects, tailoring of which could be an important element for designing a suitable OTS material. Finally, a glass transition temperature estimation model is applied to Te-based materials in order to predict materials that might have the required thermal stability. A lower average number of p-electrons is correlated with a good thermal stability

Probing the Critical Region of Conductive Filament in Nanoscale HfO₂ Resistive-Switching Device by Random Telegraph Signals

Resistive-switching random access memory (RRAM) is widely considered as a disruptive technology. Despite tremendous efforts in theoretical modeling and physical analysis, details of how the conductive filament (CF) in metal-oxide-based filamentary RRAM devices is modified during normal device operations remain speculative, because direct experimental evidence at defect level has been missing. In this paper, a random-telegraph-signal-based defect-tracking technique (RDT) is developed for probing the location and movements of individual defects and their statistical spatial and energy characteristics in the CF of state-of-the-art hafnium-oxide RRAM devices. For the first time, the critical filament region of the CF is experimentally identified, which is located near, but not at, the bottom electrode with a length of nanometer scale. We demonstrate with the RDT technique that the modification of this key constriction region by defect movements can be observed and correlated with switching operation conditions, providing insight into the resistive switching mechanism

Microscopic origin of random telegraph noise fluctuations in aggressively scaled RRAM and its impact on read disturb variability

Random telegraph noise (RTN) is an important intrinsic phenomenon of any logic or memory device that is indicative of the reliability and stochastic variability in its performance. In the context of the resistive random access memory (RRAM), RTN becomes a key criterion that determines the read disturb immunity and memory window between the low (LRS) and high resistance states (HRS). With the drive towards ultra-low power memory (low reset current) and aggressive scaling to 10 × 10 nm2 area, contribution of RTN is significantly enhanced by every trap (vacancy) in the dielectric. The underlying mechanisms governing RTN in RRAM are yet to be fully understood. In this study, we aim to decode the role of conductance fluctuations caused by oxygen vacancy transport and inelastic electron trapping and detrapping processes. The influence of resistance state (LRS, shallow and deep HRS), reset depth and reset stop voltage (VRESET-STOP) on the conductance variability is also investigated. © 2013 IEEE

The over-reset phenomenon in Ta2O5 RRAM device investigated by the RTN-based defect probing technique

IEEE Despite the tremendous efforts in the past decade devoted to the development of filamentary resistive-switching devices (RRAM), there is still a lack of in-depth understanding of its over-reset phenomenon. At higher reset stop voltages that exceed a certain threshold, the resistance at high resistance state reduces, leading to an irrecoverable window reduction. The over-reset phenomenon limits the maximum resistance window that can be achieved by using a higher Vreset, which also degrades its potential in applications such as multi-level memory and neuromorphic synapses. In this work, the over-reset is investigated by cyclic reset operations with incremental stop voltages, and is explained by defect generation in the filament constriction region of Ta2O5 RRAM devices. This is supported by the statistical spatial defects profile obtained from the random telegraph noise based defect probing technique. The impact of forming compliance current on the over-reset is also evaluated

Investigation of pre-existing and generated defects in non-filamentary a-Si/TiO2 RRAM and their impacts on RTN amplitude distribution

An extensive investigation of the pre-existing and generated defects in amorphous-Si/TiO2 based non-filamentary (a-VMCO) RRAM device has been carried out in this work to identify the switching and degradation mechanisms, through a combination of random-telegraph-noise (RTN) and constant- voltage-stress (CVS) analysis. The amplitude of RTN, which leads to read instability, is also evaluated statistically at different stages of cell degradation and correlated with different defects, for the first time. It is found that the switching between low and high resistance states (LRS and HRS) are correlated with the profile modulation of pre-existing defects in the ‘defect-less’ region near the a-Si/TiO2 interface. The RTN amplitude observed at this stage is small and has a tight distribution. At longer stress times, a percolation path is formed due to defects generation, which introduces larger RTN amplitude and a significant tail in its distribution

Doped GeSe materials for selector applications

We report on the thermal and electrical performance of nitrogen (N) and carbon (C) doped GeSe thin films for selector applications. Doping of GeSe successfully improved its thermal stability to 450 degrees C. N doping led to a decrease in the off-state leakage and an increase in threshold voltage (V-th), while C doping led to an increase in leakage and reduced V-th. Hence, we show an effective method to tune the electrical parameters of GeSe selectors by using N and C as dopants

Non-filamentary (VMCO) memory : a two- and three-dimensional study on switching and failure modes

In this work, for the first time, a set of two-and three-dimensional (3D) analysis techniques are combined to clarify the nature of resistive switching (RS) in state-of-the-art TiO2-based vacancy modulated conductive oxide (VMCO) memory. (1) A non-filamentary switching mechanism is observed. (2) The role of oxygen incorporation and motion in the TiO2 is demonstrated. (3) The oxygen profile inside scaled cells is measured and a RS-model based on the modulation of oxygen inside the stack is proposed. In addition, we perform the tomographic analysis of fully-fabricated devices with Scalpel SPM, thus probing in 3D the entire stack and the contribution of TiO2 grain boundaries (GBs) to the switching operations. Finally, devices failed by breakdown (BD) during cycling are characterized, identifying the formation of parasitic filaments as root-cause of the failure

TDDB mechanism in a-Si/TiO2 non-filamentary RRAM device

Mechanisms of time-dependent-dielectric-breakdown (TDDB) in non-filamentary a-Si/TiO2 RRAM cell (a-VMCO) have been examined in this work, including defects generation in the grain boundary, defects clustering and different defects generation rates in a-Si and TiO2 layers. The unique feature of a bimodal Weibull distribution at low resistance state (LRS) and a single shallow slope distribution at high resistance state (HRS) cannot be explained by the above mechanisms. By using a combination of constant-voltage-stress (CVS), time-to-breakdown Weibull distribution and random-telegraph-noise (RTN) based defect profiling in devices of various sizes, layer thickness and processes, it is revealed that the defect profile is modulated when switching between HRS and LRS and the correlation of defect profile modulation with local defect generation rate can explain the difference in Weibull distributions at HRS and LRS. The transition from bimodal distribution at LRS to a single-steep- slope with thinner a-Si layer, and the good area scaling of Weibull distribution at HRS but not at LRS, can also be explained. The critical layers affecting the TDDB in a-VMCO are identified, providing useful guidance for device performance improvement